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Author: Tronserve admin

Saturday 24th July 2021 09:57 PM

World’s Largest FPGA Has 35 Billion Transistors


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Xilinx’ latest offering is the greatest FPGA ever built, defeating the company’s own world record. The Virtex Ultrascale+ VU19P, built on the 16nm process node, has the highest logic density and I/O count on a single device ever built: 9 million system logic cells and over 2,000 user I/Os.


The mammoth device also features up to 1.5 Tbps of DDR4 memory bandwidth and up to 4.5 Tbps of transceiver bandwidth. Is there a market need for bigger and bigger FPGAs like this one? “Yes, most definitely there is a need, especially for emulation and prototyping of next-gen ASICs and SoCs,” said Mike Thompson, Xilinx’ Senior Product Line Manager for the new series. “An increasing number of ASIC and SoC design starts, as well as test and measurement equipment for emerging standards, are driving the needs for very large FPGAs like the VU19P.”


As reported by Thompson, the development of wireless-focused SoCs is the main application for these huge programmable logic devices; hardware prototyping of such devices enables system software integration to start many months before silicon is available. A developing number of ASIC and SoC design starts is being driven by verticals like AI, 5G, automotive and hyperscale SoCs. These types of devices are being shaped by evolving architectures, expanded software content and a general rise in complexity.


The VU19P is 1.6X bigger than its predecessor, the Virtex Ultrascale 440, built on the previous 20nm process node, which was the industry’s largest FPGA when it was produced in 2015. That device had 5.5 million system logic cells. Thompson credits the big jump in size to a combination of the company’s modular architecture, which helps scalability, and a new third generation of its stacked silicon interconnect technology, which allows smaller dice to be assembled together to create larger and larger parts without detrimentally affecting yield.


One of the biggest challenges of building such large devices is excellent cooling. “The VU19P has a lidless, flip-chip package that allows customers’ heatsinks to make direct contact with silicon,” Thompson said. “This significantly increases the cooling system’s ability to dissipate heat.” The VU19P will be generally available in the fall of 2020.


EE TIMES


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Posted on : Saturday 24th July 2021 09:57 PM

World’s Largest FPGA Has 35 Billion Transistors


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Posted by  Tronserve admin
image cap

Xilinx’ latest offering is the greatest FPGA ever built, defeating the company’s own world record. The Virtex Ultrascale+ VU19P, built on the 16nm process node, has the highest logic density and I/O count on a single device ever built: 9 million system logic cells and over 2,000 user I/Os.


The mammoth device also features up to 1.5 Tbps of DDR4 memory bandwidth and up to 4.5 Tbps of transceiver bandwidth. Is there a market need for bigger and bigger FPGAs like this one? “Yes, most definitely there is a need, especially for emulation and prototyping of next-gen ASICs and SoCs,” said Mike Thompson, Xilinx’ Senior Product Line Manager for the new series. “An increasing number of ASIC and SoC design starts, as well as test and measurement equipment for emerging standards, are driving the needs for very large FPGAs like the VU19P.”


As reported by Thompson, the development of wireless-focused SoCs is the main application for these huge programmable logic devices; hardware prototyping of such devices enables system software integration to start many months before silicon is available. A developing number of ASIC and SoC design starts is being driven by verticals like AI, 5G, automotive and hyperscale SoCs. These types of devices are being shaped by evolving architectures, expanded software content and a general rise in complexity.


The VU19P is 1.6X bigger than its predecessor, the Virtex Ultrascale 440, built on the previous 20nm process node, which was the industry’s largest FPGA when it was produced in 2015. That device had 5.5 million system logic cells. Thompson credits the big jump in size to a combination of the company’s modular architecture, which helps scalability, and a new third generation of its stacked silicon interconnect technology, which allows smaller dice to be assembled together to create larger and larger parts without detrimentally affecting yield.


One of the biggest challenges of building such large devices is excellent cooling. “The VU19P has a lidless, flip-chip package that allows customers’ heatsinks to make direct contact with silicon,” Thompson said. “This significantly increases the cooling system’s ability to dissipate heat.” The VU19P will be generally available in the fall of 2020.


EE TIMES

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xilinx fpga virtex ultrascale lagest fpga transistors ddr4 memory chips