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**This is title of the news**

18/08/2017

**Author:**
Tronserve admin

Thursday 29th July 2021 04:10 PM

Engineers at Georgia Tech say they’ve come up with a
programmable prototype chip that effortlessly solves a huge class of
optimization problems, including those needed for neural network training, 5G
network routing, and MRI image reconstruction. The chip’s architecture embodies
a particular algorithm that breaks up one huge problem into many small
problems, works on the subproblems, and shares the results. It does this over
and over until it comes up with the best answer. Compared to a GPU running the
algorithm, the prototype chip—called OPTIMO—is 4.77 times as power efficient
and 4.18 times as fast.

The training of machine learning systems and a extended
choice of other data-intensive work can be cast as a set of mathematical
problem called constrained optimization. In it, you’re trying to minimize the
value of a function under some constraints, explains Georgia Tech professor
Arijit Raychowdhury. For situation, training a neural net could involve finding
the lowest error rate under the constraint of the size of the neural network.

“If you can increase [constrained optimization] using smart
architecture and energy-efficient design, you will be able to accelerate a
large class of signal processing and machine learning problems,” says
Raychowdhury. A 1980s-era algorithm called alternating direction technique of
multipliers, or ADMM, turned out to be the solution. The algorithm solves
massive optimization problems by breaking them up and then hitting a solution
over several iterations.

“If you desire to resolve a large problem with a lot of
data—say one million data points with one million variables—ADMM allows you to
break it up into smaller subproblems,” he says. “You can cut it down into 1,000
variables with 1,000 data points.” Each subproblem is solved and the results
incorporated in a “consensus” step with the other subproblems to reach an
interim solution. With that interim solution now incorporated in the
subproblems, the process is duplicated over and over until the algorithm
arrives at the optimal solution.

In a typical CPU or GPU, ADMM is limited because it needs
the movement of a lot of data. So instead the Georgia Tech group developed a
system with a “near-memory” architecture.

“The ADMM framework as a method of solving optimization
problems maps nicely to a many-core architecture where you have memory and
logic in close proximity with some communications channels in between these
cores,” says Raychowdhury.

The test chip was made up of a grid of 49 “optimization
processing units,” cores manufactured to perform ADMM and having their own
high-bandwidth memory. The units were linked to each additional in a way that
speeds ADMM. Portions of data are spread to each unit, and they set about
solving their individual subproblems. Their results are then obtained, and the
data is modified and resent to the optimization units to do the next iteration.
The network that joins the 49 units is specifically designed to speed this
gather and scatter process.

The Georgia Tech team, which incorporated graduate student
Muya Chang and professor Justin Romberg, unveiled OPTIMO at the IEEE Custom
Integrated Circuits Conference last month in Austin, Tex.

The chip could be scaled up to do its work in the cloud—adding more cores—or shrunk down to solve problems closer to the edge of the Internet, Raychowdhury says. The leading constraint in optimizing the number of cores in the prototype, he jokes, was his graduate students’ time.

**This is the old design: **
Please remove this section after work on the functionalities for new design

Posted on : Thursday 29th July 2021 04:10 PM

none

Posted by Tronserve admin

Engineers at Georgia Tech say they’ve come up with a
programmable prototype chip that effortlessly solves a huge class of
optimization problems, including those needed for neural network training, 5G
network routing, and MRI image reconstruction. The chip’s architecture embodies
a particular algorithm that breaks up one huge problem into many small
problems, works on the subproblems, and shares the results. It does this over
and over until it comes up with the best answer. Compared to a GPU running the
algorithm, the prototype chip—called OPTIMO—is 4.77 times as power efficient
and 4.18 times as fast.

The training of machine learning systems and a extended
choice of other data-intensive work can be cast as a set of mathematical
problem called constrained optimization. In it, you’re trying to minimize the
value of a function under some constraints, explains Georgia Tech professor
Arijit Raychowdhury. For situation, training a neural net could involve finding
the lowest error rate under the constraint of the size of the neural network.

“If you can increase [constrained optimization] using smart
architecture and energy-efficient design, you will be able to accelerate a
large class of signal processing and machine learning problems,” says
Raychowdhury. A 1980s-era algorithm called alternating direction technique of
multipliers, or ADMM, turned out to be the solution. The algorithm solves
massive optimization problems by breaking them up and then hitting a solution
over several iterations.

“If you desire to resolve a large problem with a lot of
data—say one million data points with one million variables—ADMM allows you to
break it up into smaller subproblems,” he says. “You can cut it down into 1,000
variables with 1,000 data points.” Each subproblem is solved and the results
incorporated in a “consensus” step with the other subproblems to reach an
interim solution. With that interim solution now incorporated in the
subproblems, the process is duplicated over and over until the algorithm
arrives at the optimal solution.

In a typical CPU or GPU, ADMM is limited because it needs
the movement of a lot of data. So instead the Georgia Tech group developed a
system with a “near-memory” architecture.

“The ADMM framework as a method of solving optimization
problems maps nicely to a many-core architecture where you have memory and
logic in close proximity with some communications channels in between these
cores,” says Raychowdhury.

The test chip was made up of a grid of 49 “optimization
processing units,” cores manufactured to perform ADMM and having their own
high-bandwidth memory. The units were linked to each additional in a way that
speeds ADMM. Portions of data are spread to each unit, and they set about
solving their individual subproblems. Their results are then obtained, and the
data is modified and resent to the optimization units to do the next iteration.
The network that joins the 49 units is specifically designed to speed this
gather and scatter process.

The Georgia Tech team, which incorporated graduate student
Muya Chang and professor Justin Romberg, unveiled OPTIMO at the IEEE Custom
Integrated Circuits Conference last month in Austin, Tex.

The chip could be scaled up to do its work in the cloud—adding more cores—or shrunk down to solve problems closer to the edge of the Internet, Raychowdhury says. The leading constraint in optimizing the number of cores in the prototype, he jokes, was his graduate students’ time.

**Tags:**

new optimization chip
5g routing
tackling machine learning

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